The invention relates generally to synchronous systems and to the deterministic exchange of data between such synchronised systems separated by a distance.
Synchronous systems transfer data associated with clock events. Data cannot arrive at any time, only at times specified with respect to the nearby clocks. The advantage of this is that, with a constant frequency clock, it is possible to associate data transfer with a particular clock interval. There is no possibility of a datum arriving on a clock edge and it being uncertain in which clock interval it belongs. This arrangement allows predictable, deterministic operation of the system. Deterministic operation is critical for certain systems, for example in lockstep fault tolerant operation.
The connection between two synchronous systems, with filly synchronous input and output (I/O) at each system, implies that the frequency and phase of the clocks of the two systems have to be related. Synchronous connections are relatively straightforward when the two systems arc close together. However, when the systems are further apart, it is difficult to establish clock equivalence and to ensure data arrives at the right time because of the data transit times. The data cannot move faster than the speed of light.
An aim of the present invention is to provide a method and apparatus for establishing clock phase equivalence between two separated systems and for transferring data between the systems in a deterministic way in order that each system can conclusively allocate arriving data to a particular clock period with certainty.